A Bloom Filter-Based Testing Method for Improving Energy and Test Application Time for Digital Integrated Circuits

Project ID: 1874-AP
Available for licensing

Background

Contemporary, high-density chips create a severe burden on their Automatic Testing Equipment (ATE) by requiring greater test data volumes and longer test application times than previous simpler designs. To alleviate the problem, test-set embedding and test compression/decompression techniques have been proposed in the past. Although they reduce the amount of necessary hardware, design complexity, and storage requirements, most of these techniques also require excessively long test sequences to cover the predefined test set. These long test sequences require significant time to be spent on the testing processes and consume a significant portion of energy.

Invention Description

We have created a test architecture that utilizes Bloom Filters in order to decide which test vectors of the sequence generated by the testing scheme are useful and should be applied on the circuit under test (CUT). A Bloom Filter is a randomized, memory-efficient data structure for performing membership queries. By selectively applying these vectors on the CUT, we can drastically reduce the energy required to apply the generated test sequence and significantly reduce the required time of the test application.

Benefits

Applicable to ATE-driven, Built-In Self Test (BIST), and hybrid schemes
Simple design with small hardware overhead and data storing requirements

Features

Requires a small additional amount of information for test selection that can either be stored on the chip or provided by the ATE

Market Potential/Applications

Digital integrated circuit (IC) testing.

UT Researcher

Lizy K. John, Ph.D., Electrical and Computer Engineering, The University of Texas at Austin
Dimitris Kaseridis, Electrical & Comp. Engineering, The University of Texas at Austin

OTC Contact Information

Jitendra Jain, Licensing Specialist
jjain@otc.utexas.edu
512-471-9055